Product Summary
The SN74LVC74APWRG4 is a dual positive-edge-triggered D-type flip-flop with clear and preset.
Parametrics
SN74LVC74APWRG4 absolute maximum ratings: (1)Supply voltage range: –0.5 to 6.5 V; (2)Input voltage range: –0.5 to 6.5 V; (3)Output voltage range: –0.5 to VCC + 0.5 V; (4)Input clamp current VI < 0: –50 mA; (5)Output clamp current VO < 0: –50 mA; (6)Continuous output current: ±50 mA; (7)Continuous current through VCC or GND: ±100 mA; (8)Package thermal impedance D package(4): 86 °C/W; (9)Package thermal impedance DB package(4): 96 °C/W; (10)Package thermal impedance NS package(4): 76 °C/W; (11)Package thermal impedance PW package(4): 113 °C/W; (12)Package thermal impedance RGY package(5): 47 °C/W; (13)Storage temperature range: –65 to 150 °C.
Features
SN74LVC74APWRG4 features: (1)Typical VOHV (Output VOH Undershoot)>2 V at VCC = 3.3 V, TA = 25°C; (2)Latch-Up Performance Exceeds 250 mA Per; (3)Operate From 1.65 V to 3.6 V JESD 17; (4)Inputs Accept Voltages to 5.5 V; (5)ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A); 200-V Machine Model (A115-A); 1000-V Charged-Device Model (C101); (6)Max tpd of 5.2 ns at 3.3 V; (7)Typical VOLP (Output Ground Bounce)<0.8 V at VCC = 3.3 V, TA = 25°C.
Diagrams
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![]() SN74LVC74APWRG4 |
![]() Texas Instruments |
![]() Flip Flops Dual Pos-Edge-Trig D-Type Flip-Flop |
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![]() SN7400 |
![]() Other |
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![]() Data Sheet |
![]() Negotiable |
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![]() SN7400D |
![]() Texas Instruments |
![]() Gates (AND / NAND / OR / NOR) Quad 2-input Positive-NAND gates |
![]() Data Sheet |
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![]() SN7400DE4 |
![]() Texas Instruments |
![]() Gates (AND / NAND / OR / NOR) Quad 2-input Positive-NAND gates |
![]() Data Sheet |
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![]() SN7400DG4 |
![]() Texas Instruments |
![]() Gates (AND / NAND / OR / NOR) Quad 2-input Pos- NAND |
![]() Data Sheet |
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![]() SN7400DR |
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![]() IC QUAD 2IN POS-NAND GATE 14SOIC |
![]() Data Sheet |
![]() Negotiable |
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![]() SN7400DRE4 |
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![]() IC QUAD 2IN POS-NAND GATE 14SOIC |
![]() Data Sheet |
![]() Negotiable |
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