Product Summary

The IS61C632A-7TQ is a high-speed, low-power synchronous static RAM designed to provide a burstable, high-performance, secondary cache for the i486, Pentium, 680X0, and PowerPC microprocessors. The IS61C632A-7TQ is organized as 32,768 words by 32 bits, fabricated with ICSI advanced CMOS technology. The device integrates a 2-bit burst counter, highspeed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.

Parametrics

IS61C632A-7TQ absolute maximum ratings: (1)Temperature Under Bias: –10 to +85 °C; (2)Storage Temperature: –55 to +150 °C; (3)Power Dissipation: 1.8 W; (4)Output Current (per I/O): 100 mA; (5)Voltage Relative to GND for I/O Pins: –0.5 to VCCQ + 0.3 V; (6)Voltage Relative to GND for Address and Control Inputs: –0.5 to 5.5 V.

Features

IS61C632A-7TQ features: (1)Fast access time: 4 ns-125 MHZ; 5 ns-100 MHz; 6 ns-83 MHz; 7 ns-75 MHz; 8 ns-66 MHz; (2)Internal self-timed write cycle; (3)Individual Byte Write Control and Global Write; (4)Clock controlled, registered address, data and control; (5)Pentium or linear burst sequence control using MODE input; (6)Three chip enables for simple depth expansion and address pipelining; (7)Common data inputs and data outputs; (8)Power-down control by ZZ input; (9)JEDEC 100-Pin LQFP and PQFP package; (10)Single +3.3V power supply; (11)Two Clock enables and one Clock disable to eliminate multiple bank bus contention.

Diagrams

IS61C632A-7TQ pin connection

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
IS61C632A-7TQ
IS61C632A-7TQ

ISSI

SRAM 1Mb 32Kx32 7ns 3.3v

Data Sheet

Negotiable 
IS61C632A-7TQ-TR
IS61C632A-7TQ-TR

ISSI

SRAM 1Mb 32Kx32 7ns 3.3v

Data Sheet

Negotiable