74LVC574APW

74LVC574APW, Octal D-type flip-flop, 6.5 V, 50 mA, 500 mW, MSOP

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Price:: US $0.30~0.30 / piece [Get Latest Price]

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PartNumber:: 74LVC574APW

Brand:: Philips Electronics India Limited - PHILIPS | Pack: MSOP | D/C: 03+

Availability:: Supply Ability: 4/Day Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2013-06-19

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Part Number:74LVC574APW
US $0.30 - 0.30
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Product Summary

The 74LVC574APW is an Octal D-type flip-flop. The 74LVC574APW is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC574APW is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-State outputs for bus-oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The eight flip-flops will store the state of their individual D-inputs that meet the setup and hold times requirements on the LOW-to-HIGH CP transition.

Parametrics

74LVC574APW absolute maximum ratings: (1)DC supply voltage: –0.5 to +6.5 V; (2)DC input diode current: –50 mA; (3)DC input voltage Note 2: –0.5 to +6.5 V; (4)DC output diode current: ±50 mA; (5)DC output voltage; output HIGH or LOW state: –0.5 to VCC +0.5 V; (6)DC output voltage; output 3-State: –0.5 to 6.5 V; (7)DC output source or sink current: ±50 mA; (8)DC VCC or GND current: ±100 mA; (9)Storage temperature range: –65 to +150 °C; (10)Power dissipation per package– plastic mini-pack (SO): 500 mW; (11)Power dissipation per package– plastic shrink mini-pack (SSOP and TSSOP): 500 mW.

Features

74LVC574APW features: (1)5-volt tolerant inputs/outputs, for interfacing with 5-volt logic; (2)Supply voltage range of 2.7V to 3.6V; (3)Complies with JEDEC standard no. 8-1A; (4)Inputs accept voltages up to 5.5V; (5)CMOS low power consumption; (6)Direct interface with TTL levels; (7)High impedance when VCC = 0V; (8)8-bit positive edge-triggered register; (9)Independent register and 3-State buffer operation; (10)Flow-through pin-out architecture.