Product Summary
The sn74aup1g58drlr is a low-power configurable multiple-function gate. The sn74aup1g58drlr is TIs premier solution to the industrys low-power needs in battery-powered portable applications. The sn74aup1g58drlr ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity, which produces very low undershoot and overshoot characteristics. The sn74aup1g58drlr features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and noninverter. All inputs can be connected to VCC or GND.
Parametrics
sn74aup1g58drlr absolute maximum ratings: (1)Supply voltage range: –0.5 to 4.6 V; (2)Input voltage range: –0.5 to 4.6 V; (3)Voltage range applied to any output in the high-impedance or power-off state: –0.5 to 4.6 V; (4)Output voltage range in the high or low state: –0.5 to VCC + 0.5 V; (5)Input clamp current VI < 0: –50 mA; (6)Output clamp current VO < 0: –50 mA; (7)Continuous output current: ±20 mA; (8)Continuous current through VCC or GND: ±50 mA; (9)Package thermal impedance(3): DBV package:165 °C/W; DCK package: 259 °C/W; DRL package: 142 °C/W; DRY package: 234 °C/W; YFP/YZP/YZT package: 123 °C/W; (10)Storage temperature range: –65 to 150 °C.
Features
sn74aup1g58drlr features: (1)Available in the Texas Instruments NanoFree Packages; (2)Low Static-Power Consumption (ICC = 0.9 mA Max); (3)Low Dynamic-Power Consumption (Cpd = 4.6 pF Typ at 3.3 V); (4)Low Input Capacitance (Ci = 1.5 pF Typ); (5)Low Noise – Overshoot and Undershoot <10% of VCC (A114-B, Class II); (6)Ioff Supports Partial-Power-Down Mode Operation; (7)Includes Schmitt-Trigger Inputs; (8)Wide Operating VCC Range of 0.8 V to 3.6 V; (9)Optimized for 3.3-V Operation; (10)3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation; (11)tpd = 5.5 ns Max at 3.3 V; (12)Suitable for Point-to-Point Applications; (13)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II; (14)ESD Performance Tested Per JESD 22: 2000-V Human-Body Model; 200-V Machine Model (A115-A); 1000-V Charged-Device Model (C101); (15)ESD Protection Exceeds ±5000 V With Human-Body Model.
Diagrams
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![]() SN74AUP1G58DRLR |
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![]() Gates (AND / NAND / OR / NOR) Lo Pwr Cnfgrble Mult Function Gate |
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![]() SN74AUP1G58DRLRG4 |
![]() Texas Instruments |
![]() Gates (AND / NAND / OR / NOR) Lo PWR Config Multi Funct Gate |
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