Product Summary

The MC68360ZP25VL is a 32-bit controller. The MC68360ZP25VL IMB provides a common interface for all modules of the M68300 family, which allows Freescale to develop new devices more quickly by using the library of existing modules. Although the IMB definition always included an option for an on-chip 32-bit bus, the QUICC is the first device to implement this option. The MC68360ZP25VL UICC is comprised of three modules: the CPU32+ core, the SIM60, and the CPM. The MC68360ZP25VL utilizes the 32-bit IMB. The device offers automatic byte alignment features that are not offered on the CPU32. These features allow 16 or 32-bit data to be read or written at an odd address. The MC68360ZP25VL automatically performs the number of bus cycles required.

Parametrics

MC68360ZP25VL absolute maximum ratings: (1)Speed: 25MHz; (2)Voltage: 5V; (3)Package / Case: 240-BFQFP; (4)Packaging: Tray; (5)Lead Free Status: Contains Lead; (6)RoHS Status: RoHS Non-Compliant.

Features

MC68360ZP25VL features: (1)32-Bit Version of the CPU32 Core (Fully Compatible with the CPU32); (2)Background Debug Mode; (3)Byte-Misaligned Addressing; (4)Up to 32 Address Lines (At Least 28 Always Available); (5)Complete Static Design (0-5-MHz Operation); (6)Slave Mode To Disable CPU32+ (Allows Use with External Processors); (7)Multiple QUICCs Can Share One System Bus (One Master); (8)Bus Monitor; (9)Double Bus Fault Monitor; (10)Spurious Interrupt Monitor; (11)Software Watchdog; (12)Periodic Interrupt Timer; (13)Low Power Stop Mode; (14)Clock Synthesizer; (15)Breakpoint Logic Provides On-Chip Hardware Breakpoints; (16)External Masters May Use On-Chip Features Such As Chip Selects; (17)On-Chip Bus Arbitration with No Overhead for Internal Masters.

Diagrams

MC68360ZP25VL pin connection

Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
MC68360ZP25VL
MC68360ZP25VL

IC MPU QUICC 25MHZ 357-PBGA
Data Sheet
Negotiable 
MC68360ZP25VLR2
MC68360ZP25VLR2

IC MPU QUICC 25MHZ 357-PBGA
Data Sheet
Negotiable