SN75LVDS83DGGR

SN75LVDS83DGGR, transmitter, 4 V, 68 MHz, SSOP

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Price:: US $2.00~2.00 / piece [Get Latest Price]

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1 ~ 2500 :	2.00 / Piece

PartNumber:: SN75LVDS83DGGR

Brand:: Texas Instruments - TI | Pack: SSOP | D/C: 10+

Availability:: Supply Ability: 4/Day Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

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Products Upload time: 2013-06-26

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Part Number:SN75LVDS83DGGR
US $2.00 - 2.00
Quantity:

piece

Product Summary

The SN75LVDS83DGGR FlatLink transmitter contains four 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and five low-voltage differential-signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over five balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS83DGGR. The SN75LVDS83DGGR can also be used in 21-bit links with the SN75LVDS83DGGR receiver.

Parametrics

SN75LVDS83DGGR absolute maximum ratings: (1)Supply voltage range, VCC (see Note 1): –0.5 V to 4 V; (2)Output voltage range, VO (all terminals): –0.5 V to VCC + 0.5 V; (3)Input voltage range, VI (all terminals): –0.5 V to 5.5 V; (4)Continuous total power dissipation: See Dissipation Rating Table; (5)Storage temperature range, Tstg: –65 to 150 ℃; (6)Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: 260 ℃.

Features

SN75LVDS83DGGR features: (1)28:4 Data Channel Compression at up to 227.5 Million Bytes per Second Throughput; (2)Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI; (3)28 Data Channels and Clock-In Low-Voltage TTL; (4)4 Data Channels and Clock-Out Low-Voltage Differential; (5)Operates From a Single 3.3-V Supply With 250 mW (Typ); (6)ESD Protection Exceeds 6 kV; (7)5-V Tolerant Data Inputs; (8)Selectable Rising or Falling Edge-Triggered Inputs; (9)Packaged in Thin Shrink Small-Outline Package With 20-Mil Terminal Pitch; (10)Consumes Less Than 1 mW When Disabled; (11)Wide Phase-Lock Input Frequency Range: 31 MHz to 68 MHz; (12)No External Components Required for PLL; (13)Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard.