Product Summary

The 74HC125D is a 3-State Quad Buffer/Line Driver. The 74HC125D is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC125D is four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a HIGH impedance OFF-state. The “125” is identical to the “126” but has active LOW enable inputs.

Parametrics

74HC125D absolute maximum ratings: (1)propagation delay nA to nY, CL = 15 pF; VCC = 5V, tPHL/ tPLH: 9ns; (2)input capacitance, CI: 3.5pF; (3)power dissipation capacitance per buffer, CPD: 22pF.

Features

74HC125D features: (1)Output capability: bus driver; (2)ICCcategory: MSI.

Diagrams

74HC125M pin connection