Product Summary

The si2307bds-t1-e3 is a P-Channel 30-V (D-S) MOSFET. The attached spice model describes the typical electrical characteristics of the p-channel vertical DMOS. The subcircuit model is extracted and optimized over the -55 to 125°C temperature ranges under the pulsed 0-V to 10-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.



Parametrics

si2307bds-t1-e3 absolute maximum ratings: (1)Gate Threshold Voltage VGS(th): VDS = VGS, ID = -250 µA 2.1 V; (2)On-State Drain Current a ID(on): VDS = -5 V, VGS = -10 V 73 A; (3)Drain-Source On-State Resistance a rDS(on): VGS = -4.5 V, ID = -2.5 A 0.101 0.105 ; (4)Forward Transconductance a gfs: VDS = -10 V, ID = -3.2 A 5 S; (5)Diode Forward Voltage a VSD: IS = 0.75 A, VGS = 0 V 0.85 V .

Features

si2307bds-t1-e3 features: (1)P-Channel Vertical DMOS; (2)Macro Model (Subcircuit Model); (3)Level 3 MOS; (4)Apply for both Linear and Switching Application; (5)Accurate over the 55 to 125°C Temperature Range; (6)Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics.

Diagrams

si2307bds-t1-e3 pin connection

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
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Data Sheet

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100-250: $0.17
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