Product Summary

The M2V64S40DTP-7 is a 4-bank x 1,048,576-word x 16-bit, synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. M2V64S40DTP-7 achieve very high speed data rate up to 133MHz for -6, and is suitable for main memory or graphic memory in computer systems.

Parametrics


M2V64S40DTP-7 absolute maximum ratings: (1)Supply Voltage with respect to Vss: -0.5 to 4.6 V; (2)Supply Voltage for Output with respect to VssQ: -0.5 to 4.6 V; (3)Input Voltage with respect to Vss: -0.5 to Vdd+0.5 V; (4)Output Voltage with respect to VssQ: -0.5 to VddQ+0.5 V; (5)Output Current: 50 mA; (6)Power Dissipation Ta = 25 ℃: 1000 mW; (7)Operating Temperature: 0 to 70 ℃; (8)Storage Temperature: -65 to 150 ℃.

Features

M2V64S40DTP-7 features: (1)Single 3.3v±0.3V power supply; (2)Max. Clock frequency -6:133MHz<3-3-3>, -7:100MHz<2-2-2>, -8:100MHz<3-2-2>; (3)Fully Synchronous operation referenced to clock rising edge; (4)4 bank operation controlled by BA0 & BA1 (Bank Address); (5)/CAS latency2 and 3 (programmable); (6)Burst length1, 2, 4, 8 and full page (programmable); (7)Burst typesequential and interleave (programmable); (8)Byte ControlDQML and DQMU for M2V64S40DTP; (9)Random column access; (10)Auto precharge and All bank precharge controlled by A10; (11)Auto refresh and Self refresh; (12)4096 refresh cycles every 64ms; (13)LVTTL Interface; (14)400-mil, 54-pin Thin Small Outline Package (TSOP II)with 0.8mm lead pitch.

Diagrams

M2V64S40DTP-7 pin connection