(China (Mainland))
Product Summary
The SN74LV126ADR quadruple bus buffer gate is designed for 2-V to 5.5-V VCC operation. The SN74LV126ADR features independent line drivers with 3-state outputs. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Parametrics
SN74LV126ADR absolute maximum ratings: (1)Supply voltage range, VCC: -0.5 V to 7 V; (2)Input voltage range, VI: -0.5 V to 7 V; (3)Voltage range applied to any output in the high-impedance; (4)or power-off state, VO: -0.5 V to 7 V; (5)Output voltage range, VO: -0.5 V to VCC + 0.5 V; (6)Input clamp current, IIK (VI < 0): -20 mA; (7)Output clamp current, IOK (VO < 0): -50 mA; (8)Continuous output current, IO (VO = 0 to VCC): ±35 mA; (9)Continuous current through VCC or GND: ±70 mA; (10)Storage temperature range, Tstg: -65°C to 150°C.
Features
SN74LV126ADR features: (1)2-V to 5.5-V VCC Operation; (2)Max tpd of 6.5 ns at 5 V; (3)Typical VOLP (Output Ground Bounce)<0.8 V at VCC = 3.3 V, TA = 25°C; (4)Typical VOHV (Output VOH Undershoot)>2.3 V at VCC = 3.3 V, TA = 25°C; (5)Support Mixed-Mode Voltage Operation on All Ports; (6)Latch-Up Performance Exceeds 250 mA Per JESD 17; (7)ESD Protection Exceeds JESD 22.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
 |
 SN74LV126ADR |
Texas Instruments |
Buffers & Line Drivers Tri-St. Quad Bus |
Data Sheet |
|
|
||||||||||||
|
SN74LV126ADRE4 |
Texas Instruments |
Buffers & Line Drivers Quad Bus Buff Gate With 3-State Outputs |
Data Sheet |
|
|
||||||||||||
|
SN74LV126ADRG4 |
Texas Instruments |
Buffers & Line Drivers Quad Bus Buffer Gate |
Data Sheet |
|
|
||||||||||||
