Product Summary
The 74LVC06AD is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 to 5 V environment. The 74LVC06AD provides six inverting buffers. The outputs of the 74LVC06AD devices are open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Parametrics
74LVC06AD absolute maximum ratings: (1)DC supply voltage: -0.5 to +6.5 V; (2)DC input diode current: -50 mA; (3)DC input voltage: -0.5 to +6.5 V; (4)DC output clamping diode current: -50 mA; (5)DC output voltage active mode; note: -0.5 to VCC + 0.5 V; (6)DC output voltage high-impedance mode note 1: -0.5 to +6.5 V; (7)DC output sink current VO = 0 to VCC: 50 mA; (8)DC VCC or GND current: ±100 mA; (9)Storage temperature: -65 to +150 °C; (10)Power dissipation per package SO package: 500 mW; (11)Power dissipation per package TSSOP package: 500 mW.
Features
74LVC06AD features: (1)5 V tolerant inputs and outputs (open drain)for interfacing with 5 V logic; (2)Wide supply voltage range from 1.65 to 5.5 V; (3)CMOS low power consumption; (4)Direct interface with TTL levels; (5)Inputs accept voltages up to 5 V; (6)Complies with JEDEC standard no. 8-1A.
Diagrams
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![]() 74LVC06AD,118 |
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![]() Buffers & Line Drivers HEX INV BUFF/DRVR |
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